NOC:CMOS Digital VLSI Design


Lecture 1 - MOS Transistor Basics - I


Lecture 2 - MOS Transistor Basics - II


Lecture 3 - MOS Transistor Basics - III


Lecture 4 - MOS Parasitics and SPICE Model


Lecture 5 - CMOS Inverter Basics - I


Lecture 6 - CMOS Inverter Basics - II


Lecture 7 - CMOS Inverter Basics - III


Lecture 8 - Power Analysis - I


Lecture 9 - Power Analysis - II


Lecture 10 - SPICE Simulation - I


Lecture 11 - SPICE Simulation - II


Lecture 12 - Combinational Logic Design - I


Lecture 13 - Combinational Logic Design - II


Lecture 14 - Combinational Logic Design - III


Lecture 15 - Combinational Logic Design - IV


Lecture 16 - Combinational Logic Design - V


Lecture 17 - Combinational Logic Design - VI


Lecture 18 - Combinational Logic Design - VII


Lecture 19 - Combinational Logic Design - VIII


Lecture 20 - Combinational Logic Design - IX


Lecture 21 - Combinational Logic Design - X


Lecture 22 - Logical Efforts - I


Lecture 23 - Logical Efforts - II


Lecture 24 - Logical Efforts - III


Lecture 25 - Sequential Logic Design - I


Lecture 26 - Sequential Logic Design - II


Lecture 27 - Sequential Logic Design - III


Lecture 28 - Sequential Logic Design - IV


Lecture 29 - Sequential Logic Design - V


Lecture 30 - Sequential Logic Design - VI


Lecture 31 - Sequential Logic Design - VII


Lecture 32 - Sequential Logic Design - VIII


Lecture 33 - Clocking Strategies for Sequential Design - I


Lecture 34 - Clocking Strategies for Sequential Design - II


Lecture 35 - Clocking Strategies for Sequential Design - III


Lecture 36 - Clocking Strategies for Sequential Design - IV


Lecture 37 - Sequential Logic Design - IX


Lecture 38 - Clocking Strategies for Sequential Design - V


Lecture 39 - Concept of Memory and its Designing - I


Lecture 40 - Concept of Memory and its Designing - II